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INTEGRATED CIRCUITS
74F543 Octal registered transceiver, non-inverting (3-State) 74F544 Octal registered transceiver, inverting (3-State)
Product specification IC15 Data Handbook 1994 Dec 5
Philips Semiconductors
Philips Semiconductors
Product specification
Octal registered transceivers
74F543 74F544
FEATURES
74F543, 74F544
Octal registered transceiver, non-inverting (3-State) Octal registered transceiver, inverting 93-State)
FUNCTIONAL DESCRIPTION
The 74F543 and 74F544 contain two sets of eight D-type latches, with separate input and controls for each set. For data flow from A to B, for example, the A-to-B Enable (EAB) input must be Low in order to enter data from A0 - A7 or take data from B0 - B7, as indicated in the Function Table. With EAB Low, a Low signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent Low-to-High transition for the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With EAB and OEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. TYPICAL PROPAGATION DELAY 6.0ns 6.5ns TYPICAL SUPPLY CURRENT (TOTAL) 80mA 95mA
* Combines74F245 and 74F373 type functions in one chip * 8-bit octal transceiver with D-type latch * 74F543 Non-inverting * Back-to-back registers for storage * Separate controls for data flow in each direction * A outputs sink 20mA and source 3mA * B outputs sink 64mA and source 15mA * 3-State outputs for bus-oriented applications * 74F543 available in SSOP Type II package
DESCRIPTION
The 74F543 and 74F544 Octal Registered Transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. While the 74F543 has non-inverting data path, the 74F544 inverts data in both directions. The A outputs are guaranteed to sink 24mA, while the B outputs are rated for 64mA. 74F544 Inverting
TYPE 74F543 74F544
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE VCC = 5V 10%, TA = 0C to +70C N74F543N, N74F544N N74F543D, N74F544D 74F543DB DRAWING NUMBER SOT222-1 SOT137-1 SOT340-1
24-pin plastic skinny DIP (300mil) 24-pin plastic SOL 24-pin plastic SSOP Type II
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS A0 - A7 B0 - B7 OEAB 74F543 74F544 OEBA EAB EBA LEAB LEBA 74F543 A0 - A7 B0 - B7 74F544 A0 - A7 B0 - B7 DESCRIPTION Port A, 3-State inputs Port B, 3-State inputs A-to-B Output Enable input (Active Low) B-to-A Output Enable input (Active Low) A-to-B Enable input (Active Low) B-to-A Enable input (Active Low) A-to-B Latch Enable input (Active Low) B-to-A Latch Enable input (Active Low) Port A, 3-State outputs Port B, 3-State outputs Port A, 3-State outputs Port B, 3-State outputs 74F(U.L.) HIGH/LOW 3.5/1.0 3.5/1.0 1.0/1.0 1.0/1.0 1.0/2.0 1.0/2.0 1.0/1.0 1.0/1.0 150/40 750/106.7 150/40 750/106.7 LOAD VALUE HIGH/LOW 70A/0.6mA 70A/0.6mA 20A/0.6mA 20A/0.6mA 20A/1.2mA 20A/1.2mA 20A/0.6mA 20A/0.6mA 3.0mA/24mA 15mA/64mA 3.0mA/24mA 15mA/64mA
NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High State and 0.6mA in the Low state. 1994 Dec 5 2 853-0874 14379
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
PIN CONFIGURATION - 74F543
LEBA OEBA A0 A1 A2 A3 A4 A5 A6 1 2 3 4 5 6 7 8 9 24 VCC 23 EBA 22 B0
LOGIC SYMBOL - 74F543
3 4 5 6 7 8 9 10
A0 A1 A2 A3 A4 A5 A6 A7 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB VCC = Pin 24 GND = Pin 12 22 21 20 19 18 17 16 15 B0 B1 B2 B3 B4 B5 B6 B7 11 23 14 1 EAB EBA LEAB LEBA OEAB OEBA 13 2
A7 10 EAB 11 GND 12
SF00237
SF00238
LOGIC SYMBOL (IEEE/IEC) - 74F543
2 23 1 13 11 14 IEN3 G1 1C5 2EN4 G2 2C6
3 4 5 6 7 8 9 10
3 6D
5D 4
22 21 20 19 18 17 16 15
SF00239
1994 Dec 5
3
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
PIN CONFIGURATION - 74F544
LEBA OEBA A0 A1 A2 A3 A4 A5 A6 1 2 3 4 5 6 7 8 9 24 VCC 23 EBA 22 B0
LOGIC SYMBOL - 74F544
3 4 5 6 7 8 9 10
A0 A1 A2 A3 A4 A5 A6 A7 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB VCC = Pin 24 GND = Pin 12 22 21 20 19 18 17 16 15 B0 B1 B2 B3 B4 B5 B6 B7 11 23 14 1 EAB EBA LEAB LEBA OEAB OEBA 13 2
A7 10 EAB 11 GND 12
SF00240
SF00242
LOGIC SYMBOL (IEEE/IEC) - 74F544
2 23 1 13 11 14 IEN3 G1 1C5 2EN4 G2 2C6
FUNCTION TABLE for 74F543 and 74F544
INPUTS OEXX H X L L
22 21 20 19 18 17 16 15
OUTPUTS DATA X X h l h l H L X 74F543 Z Z Z Z H L H L NC 74F544 Z Z Z Z L H L H NC
STATUS Disabled Disabled Disable + Latch Latch + Display Transparent Hold
EXX X H L L L L L
LEXX X X L L L L H
3 4 5 6 7 8 9 10
3 6D
5D 4
L L L L L H L h
SF00241
= High voltage level = Low voltage level = High state must be present one setup time before the Low-to-High transition of LEXX or EXX (XX=AB or BA) l = Low state must be present one setup time before the Low-to-High transition of LEXX or EXX (XX=AB or BA) = Low-to-High transition of LEXX or EXX XX = AB or BA X = Don't care NC = No change Z = High impedance "off" state
1994 Dec 5
4
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
LOGIC DIAGRAM FOR 74F543
D Q DETAIL A 22 B0
LE A0 3 Q D
LE
A1 A2 A3 A4 A5 A6 A7 OEBA
4 5 6 7 8 9 10 2 DETAIL A X 7
21 20 19 18 17 16 15
B1 B2 B3 B4 B5 B6 B7
13 OEAB EBA LEBA VCC = Pin 24 GND = Pin 12 23 11 1 EAB
14 LEAB
SF00243
LOGIC DIAGRAM FOR 74F544
D Q DETAIL A 22 B0
LE A0 3 Q D
LE
A1 A2 A3 A4 A5 A6 A7 OEBA
4 5 6 7 8 9 10 2 DETAIL A X 7
21 20 19 18 17 16 15
B1 B2 B3 B4 B5 B6 B7
13 EBA VCC = Pin 24 GND = Pin 12 LEBA 23 11 1 14
OEAB
EAB LEAB
SF00244
1994 Dec 5
5
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IO OUT Tamb TSTG Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature A0 - A7, A0 - A7 B0 - B7, B0 - B7 PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to +5.5 48 128 0 to +70 -65 to +150 UNIT V V mA V mA mA
C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IO OH Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level High level output current A0 - A7, A0 - A7 B0 - B7, B0 - B7 Low-level Low level output current Operating free-air temperature range A0 - A7, A0 - A7 B0 - B7, B0 - B7 -0 PARAMETER LIMITS MIN 4.5 2.0 0.8 -18 -3 -15 24 64 +70 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA mA mA
C
IO OL Tamb
1994 Dec 5
6
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER A0 - A7, A0 - A7 VOH High-level out ut voltage output B0 - B7, B0 - B7 A0 - A7, A0 - A7 VOL Low-level out ut voltage output B0 - B7, B0 - B7 VIK II IIH IIL IOZH + IIH IOZH + IIL Input clamp voltage Input current at maximum input voltage High-level input current Others Low-level input current EAB, EBA VCC = MAX, VI = 0.5V VCC= MAX, VO = 2.7V VCC= MAX, VO = 0. 5V -60 VCC = MAX -100 70 VCC = MAX 95 95 80 VCC = MAX 105 100 OEAB, OEBA, EAB Others TEST CONDITIONS1 "10%VCC "5%VCC "10%VCC "5%VCC "10%VCC "5%VCC "10%VCC "5%VCC 0.42 -0.73 LIMITS MIN 2.4 2.7 2.0 2.0 0.35 0.35 0.50 0.50 0.55 0.55 -1.2 100 1 20 -0.6 -1.2 70 -600 -150 -225 105 135 135 110 140 135 3.4 TYP2 MAX UNIT V V V V V V V V V A mA A mA mA A A mA mA mA mA mA mA mA mA
VCC = MIN VIL = MAX VIH = MIN
IOH = -3mA
IOH = -15mA
VCC = MIN VIL = MAX VIH = MIN
IOL = 24mA
IOL = 64mA
VCC = MIN, II = IIK VCC = MAX, VI = 7.0 V VCC = 5.5, VI = 5.5V VCC = MAX, VI = 2.7V
Off-state output current, high-level voltage applied Off-state output current, Low-level voltage applied A0 - A7, A0 - A7 B0 - B7, B0 - B7 ICCH 74F543 ICCL ICCZ ICCH 74F544 ICCL ICCZ
IOS
Short-circuit output out ut
current3
ICC
Su ly Supply current (total)
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1994 Dec 5
7
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
AC ELECTRICAL CHARACTERISTICS FOR 74F543
74F543 LIMITS Tamb = +25C VCC = 5.0V CL = 50pF RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Propagation delay An to Bn Propagation delay Bn to An Propagation delay LEBA to An Propagation delay LEAB to Bn Output Enable time OEBA to An or OEAB to Bn Output Disable time OEBA to An or OEAB to Bn Output Enable time EBA to An or EAB to Bn Output Disable time EBA to An or EAB to Bn Waveform 2 Waveform 2 Waveform NO TAG, 2 Waveform NO TAG, 2 Waveform 4 Waveform 5 Waveform 4 Waveform 5 Waveform 4 Waveform 5 Waveform 4 Waveform 5 3.5 3.0 2.5 2.5 5.0 4.0 6.0 4.5 2.0 3.5 1.0 1.5 4.5 5.0 2.5 4.5 TYP 5.5 5.0 4.0 4.5 7.0 6.0 8.5 6.5 4.0 5.0 3.0 4.0 7.0 7.0 5.0 7.0 MAX 8.5 8.0 7.0 7.5 10.0 9.0 11.5 9.5 7.5 8.5 6.5 7.5 10.5 10.5 8.5 11.0 Tamb = 0C to +70C VCC = 5.0V 10% CL = 50pF RL = 500 MIN 3.0 2.5 2.5 2.5 4.5 4.0 5.5 4.0 1.5 3.0 1.0 1.0 4.0 4.5 2.0 3.0 MAX 9.0 8.5 7.5 8.0 11.0 9.5 12.5 10.0 8.0 9.0 7.5 8.5 11.5 11.0 9.5 12.0 ns ns ns ns ns ns ns ns
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
AC SETUP REQUIREMENTS FOR 74F543
74F543 LIMITS Tamb = +25C VCC = 5.0V CL = 50pF RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(L) Setup time, High or Low An to LEAB or Bn to LEBA Hold time, High or Low An to LEAB or Bn to LEBA Setup time, High or Low An to EAB or Bn to EBA Hold time, High or Low An to EAB or Bn to EBA Latch enable pulse width, Low Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 3 0.0 2.5 0.0 1.5 1.0 2.5 0.0 1.5 4.0 TYP Tamb = 0C to +70C VCC = 5.0V 10% CL = 50pF RL = 500 MIN 0.0 3.0 0.0 2.0 1.5 3.0 0.0 2.0 4.5 MAX ns ns ns ns ns
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
1994 Dec 5
8
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
AC ELECTRICAL CHARACTERISTICS FOR 74F544
74F544 LIMITS Tamb = +25C VCC = 5.0V CL = 50pF RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Propagation delay An to Bn or Bn to An Propagation delay LEBA to An Propagation delay LEAB to Bn Output Enable time OEBA to An or OEAB to Bn Output Disable time OEBA to An or OEAB to Bn Output Enable time EBA to An or EAB to Bn Output Disable time EBA to An or EAB to Bn Waveform NO TAG Waveform NO TAG, 2 Waveform NO TAG, 2 Waveform 4 Waveform 5 Waveform 4 Waveform 5 Waveform 4 Waveform 5 Waveform 4 Waveform 5 3.0 3.0 4.0 4.0 5.0 4.0 2.0 3.5 1.0 1.5 4.0 4.5 2.5 4.5 TYP 6.5 5.0 7.0 7.0 8.0 7.5 4.0 5.5 4.0 4.0 7.0 8.0 5.0 8.5 MAX 9.5 8.0 9.5 9.5 11.5 9.5 7.0 8.5 6.5 6.5 9.5 11.0 8.0 11.5 Tamb = 0C to +70C VCC = 5.0V 10% CL = 50pF RL = 500 MIN 3.0 3.0 4.0 4.0 4.0 4.0 1.5 3.0 1.0 1.5 3.5 4.5 2.5 4.0 MAX 10.5 8.5 10.5 10.5 12.5 10.5 7.5 9.0 7.0 7.5 10.0 12.0 9.0 11.5 ns ns ns ns ns ns ns
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
AC SETUP REQUIREMENTS FOR 74F544
74F544 LIMITS Tamb = +25C VCC = 5.0V CL = 50pF RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(L) Setup time, High or Low An to LEAB or Bn to LEBA Hold time, High or Low An to LEAB or Bn to LEBA Setup time, High or Low An to EAB or Bn to EBA Hold time, High or Low An to EAB or Bn to EBA Latch enable pulse width, Low Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 3 1.5 1.5 1.5 2.0 1.5 1.5 1.5 2.0 4.0 TYP Tamb = 0C to +70C VCC = 5.0V 10% CL = 50pF RL = 500 MIN 2.0 2.5 2.5 2.5 2.5 2.5 2.0 2.0 4.5 MAX ns ns ns ns ns
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
1994 Dec 5
9
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
AC WAVEFORMS
VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance.
OEAB, OEBA EAB, EBA VIN VM tPHL VOUT VM VM tPLH VM An, Bn An, Bn
VM tPZH VM
VM tPHZ VOH -0.3V
0V
SF00245
SF00248
Waveform 1.
Propagation Delay for Inverting Outputs
Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level
VIN
VM tPLH
VM tPHL VM VM
OEAB, OEBA EAB, EBA
VM tPZL VM
VM tPLZ
VOUT
An, Bn An, Bn
SF00246
VOL +0.3V
Waveform 2.
Propagation Delay for Non-Inverting Outputs
SF00249
An Bn An Bn ts(H)
Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
VM VM th(H) VM tw(L) ts(L) VM VM VM th(L)
LEAB, LEBA EAB, EBA
SF00247
Waveform 3.
Data Setup Time and Hold Times, and Latch Enable Pulse Width
1994 Dec 5
10
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V)
90%
Test Circuit for Open Collector Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open
VM
Input Pulse Definition
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00128
1994 Dec 5
11
Philips Semiconductors
Product specification
Bus transceivers
74F543, 74F544
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1994 Dec 05
12
Philips Semiconductors
Product specification
Bus transceivers
74F543, 74F544
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1994 Dec 05
13
Philips Semiconductors
Product specification
Bus transceivers
74F543, 74F544
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1994 Dec 05
14
Philips Semiconductors
Product specification
Bus transceivers
74F543, 74F544
NOTES
1994 Dec 05
15
Philips Semiconductors
Product specification
Octal registered transceivers
74F543, 74F544
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. (c) Copyright Philips Electronics North America Corporation 1994 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-05135

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